1. Field of the Invention
This invention relates to a tantalum capacitor chip of the type which comprises an anode wire partially inserted in and partially projecting from a chip body which is a compacted mass of tantalum powder. The present invention also relates to a process for making such a chip, and to a tantalum capacitor incorporating the same.
2. Description of the Prior Art
As is well known, capacitors have the function of storing and discharging electrical energy, and are widely used in designing electrical and electronical circuits. Obviously, the capacitor should preferably have such features as (1) long-life, (2) good temperature characteristics, (3) low leak current, (2) good frequency characteristics, and (5) small size with large capacity. One typical example meeting such requirements is the solid tantalum capacitor.
A prior art solid tantalum capacitor is typically made by using such a compacting apparatus as shown in FIGS. 12 and 13 of the accompanying drawings. Specifically, the compacting apparatus generally designated by reference numeral 4" comprises a die 5" having a through-bore 8", a lower punch 6" and an upper punch 7" having a wire holding bore 10". The respective punches 6", 7" are slidably movable in the through-bore 8" of the die 5" toward and away from each other.
In manufacture, a predetermined amount of tantalum powder 11" having a mesh size of e.g. 100-300 micrometers is loaded into the through-bore 8" of the die 5", with the lower punch 6" inserted into the through-bore 8", as shown in FIG. 12. Then, the upper punch 7" holding an anode wire 3" is inserted into the through-bore 8", and the lower and upper punches 6", 7" are moved toward each other up to a predetermined distance, as shown in FIG. 13.
As a result, the loaded tantalum powder is compacted into a chip body 2" with the anode wire 3" partially inserted therein and partially projecting therefrom, as illustrated in FIG. 14. The degree of compaction is such that the bulk density (apparent density) of the chip body is in the range of 6-8 g/cm.sup.3, as opposed to the specific weight of 16.6 for tantalum. Thus, the chip body is considered highly porous.
The resulting chip body 2" thus obtained is sintered in a vacuum sintering furnace. Thereafter, the chip body 2" is subjected to an oxidizing step wherein it is dipped in a strong acid solution and electrolytically oxidized to form an oxide coating (Ta.sub.2 O.sub.5), which is a dielectric substance, on the individual tantalum grains of the chip body. The electrolytic oxidation occurs within the pores of the chip body according to the following reaction. EQU Ta.sub.2 +5H.sub.2 O.fwdarw.Ta.sub.2 O.sub.5 +5H.sub.2
After the oxidizing step described above, the chip body 2" is immersed in a solution of manganese nitrate (Mn(NO.sub.3).sub.2) which is thermally decomposed to form a layer of manganese dioxide (MnO.sub.2) which is a solid electrolyte (semiconductor) substance.
Then, the outer surfaces of the chip body 2" are subjected to a graphitizing treatment and a metalizing treatment (e.g. silver coating treatment) to form a cathode electrode. A capacitor chip is thus obtained.
Finally, the capacitor chip is formed into a final product by undergoing aftertreatments which include a soldering step (for attaching leads), a packaging step, a marking step, and etc.
The prior art process described above is disadvantageous in the following respects.
First, due to the compaction of the tantalum powder provided by the die 5" and the punches 6", 7", the density of the chip body 2" is highest at the surfaces of the chip body and progressively decreases toward the center of the chip body. Therefore, while the anode wire 3" is firmly and stably retained at a high density surface region of the chip body, the retention of the anode wire 3" is rather loose at the center of the chip body. As a result, the adhesion between the anode wire and the surrounding tantalum grains may fail to endure stresses caused by an external force for example, so that the oxide coatings of the surrounding tantalum grains may be damaged to cause an operation failure or a current leakage.
Secondly, to achieve a sufficient average density required for realizing a predetermined capacitance by a single compacting step, the density at the surfaces of the chip body 2" tends to become excessively high. Thus, when the chip body is subsequently immersed in a manganese nitrate solution for performing the semiconductor forming step, the excessively high density (namely, excessively low void ratio) at the surfaces of the chip body hinders the manganese nitrate solution from penetrating deeply into the chip body, thereby prolonging the time required for performing the semiconductor forming step. In an extreme case, the formed semiconductor substance (MnO.sub.2) may prematurely clog up the surface voids or pores to completely prohibit further solution penetration into the remaining inner voids, thereby leading to a defective product.